Hello forum,
I'll be working on non-ideal buck converter soon. To approximate simulation to real-world results, I'm trying to use real components. Before starting my real project I'm going step by step.
To do that I've been working on to warm-up pspice with shown below circuit.
The problem is Vgs signal is generated as expected but load resistor which is Rload is shorted out so current isn't flowing between Vsply and GND(0). As a result, the red and green current probes are hitting huge values(~327Amps).
I tried different some other configurations which are:
They also didn't work. Orcad version is 17.2.
How can I solve this issue?
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You should isolate the gate drive. This will break the direct current path. By just Looking at the picture it is not clear what is the reference node for the driver circuit.