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#1 Jun 15, 2021
bnilsson
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74LVC541 divide-by-zero

Hi,

I am new to PSPice and I need some advice.

I am trying to simulate a SN74LVC541A, a simple pulse input to see the delay.

However, it only works for VCC up to 2.99Vdc, 3.0Vdc and above gives me divide-by-zero in the simulation.

The nominal VCC for this device is specified 1.6 to 3.6 Vdc.

Is this a bug in the model, or am I doing something wrong?

BN

Tue, 2021-06-22 09:19
alok
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would it be possible to share the design you are trying to simulate?

Tue, 2021-06-22 15:32 (Reply to #2)
bnilsson
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Simplest possible circuit, a pulse source in and a rc load and two voltage probes.

 

Tue, 2021-06-22 10:09
retiredEE
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Joined: 2018-03-21 12:19

I ran a pulse input simulation on both the SN74LV541A and the SN74LVC541A.  Like you, I had errors with the SN74LVC541A for VCC levels of 3 volts and above.  I compared the models of both parts and found an issue with the SN74LVC541A.  There is a subcircuit in its model that has two controlled voltage sources (EROH and EROL) that are controlled by a TABLE of input/output pairs for the input value of VCC.  In these tables, both of these sources have two entries for a 3 volt VCC input.  I believe that this is what causes an error when VCC equals or exceeds 3 volts.  The model needs to be changed to only one entry but I don't know which one is the correct value.

If you're just doing this to learn PSpice, try the SN74LV541A part.  It will work over its full operating voltage range.  However, both parts have an issue with the tristate input OEZ.  When activated, it holds the Y output at logic low rather than switching it to a high Z state.

Tue, 2021-06-22 15:36 (Reply to #4)
bnilsson
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Thanks for the suggestion, it worked fine with the SN74LV541A.

I am not using the tri-state for the moment, so this is no issue for me.  In reality, I am using the SN74LVC541 ion my PCB, but I need to correctly predict the delays in my further design. Hopefully the LV behaves the same as the LVC?

 

Wed, 2021-06-30 01:31
vick11
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