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#1 Aug 10, 2016
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Getting incorrect simulation results when defining very small Max Step Size

 

Problem

 

Getting incorrect simulation results when defining very small Max Step Size in simulation settings. Increasing the step-size gives correct simulation results. Why this difference in results is coming based on step-size?

 

Solution

 

If a circuit has non-linear devices like MOS, BJT etc or an OPAMP which is made up from these devices, then very small step size should not be used. The strong non-linearity or discontinuity in model characteristics of these devices may guide simulator to converge to wrong values or give convergence error. This behavior is same for all SPICE simulators. These non-linearities are typically present at intersection of various regions (like active -> saturation, cutoff-> saturation) as these regions are modeled separately and joined together to provide the complete characteristics. Using very small time step normally traps the simulator in those intersection points. Solution is to increase the step size so as to jump those intersection regions. 


Very small step size should be used if there are high frequency sources in the circuit. With high frequency sources, small step size is required to get correct result. But as this circuit didn't have any high frequency source, small step size is not needed. If small step size was being used for higher accuracy, you may try using small values of tolerances (RELTOL,ABSTOL,TRTOL) to improve accuracy.

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